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We designed and evaluated an experimental SFADC by using standard CMOS logic ICs to explore issues due to relatively small number of comparators (90 comparators) are used.", "subitem_description_type": "Abstract"}]}, "item_5_publisher_32": {"attribute_name": "\u51fa\u7248\u8005", "attribute_value_mlt": [{"subitem_publisher": "\u4e00\u822c\u793e\u56e3\u6cd5\u4eba \u96fb\u6c17\u5b66\u4f1a"}]}, "item_5_rights_12": {"attribute_name": "\u6a29\u5229", "attribute_value_mlt": [{"subitem_rights": "c2014 by IEEJ"}]}, "item_5_select_15": {"attribute_name": "\u8457\u8005\u7248\u30d5\u30e9\u30b0", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_access_right": {"attribute_name": "\u30a2\u30af\u30bb\u30b9\u6a29", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "\u8457\u8005", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "\u7af9\u7aef, \u4e45\u767b", "creatorNameLang": "ja"}], "nameIdentifiers": [{"nameIdentifier": "89909", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "\u8c37\u672c, \u6d0b", "creatorNameLang": "ja"}], "nameIdentifiers": [{"nameIdentifier": "220", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "20322886", "nameIdentifierScheme": "KAKEN - \u7814\u7a76\u8005\u691c\u7d22", "nameIdentifierURI": "https://nrid.nii.ac.jp/ja/nrid/1000020322886/"}]}, {"creatorNames": [{"creatorName": "\u5409\u6fa4 , \u771f\u543e", "creatorNameLang": "ja"}], "nameIdentifiers": [{"nameIdentifier": "298", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "20447080", "nameIdentifierScheme": "KAKEN - \u7814\u7a76\u8005\u691c\u7d22", "nameIdentifierURI": "https://nrid.nii.ac.jp/ja/nrid/1000020447080/"}]}]}, "item_files": {"attribute_name": "\u30d5\u30a1\u30a4\u30eb\u60c5\u5831", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-02-13"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "ECT-14-58.pdf", "filesize": [{"value": "602.1 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 602100.0, "url": {"label": "ECT-14-58", "url": "https://kitami-it.repo.nii.ac.jp/record/8619/files/ECT-14-58.pdf"}, "version_id": "39bfa450-0f25-46bb-89af-fe9339e62d3a"}]}, "item_keyword": {"attribute_name": "\u30ad\u30fc\u30ef\u30fc\u30c9", "attribute_value_mlt": [{"subitem_subject": "\u78ba\u7387\u7684\u30d5\u30e9\u30c3\u30b7\u30e5\u578bADC", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "CMOS\u30a4\u30f3\u30d0\u30fc\u30bf", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "\u30aa\u30d5\u30bb\u30c3\u30c8\u3070\u3089\u3064\u304d", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "CMOS\u6a19\u6e96\u30ed\u30b8\u30c3\u30af", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "stochastic fiash ADC", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}, {"subitem_subject": "CMOS inverter", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Offset variation\uff0cstandard CMOS logic", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "\u8a00\u8a9e", "attribute_value_mlt": [{"subitem_language": "jpn"}]}, "item_resource_type": {"attribute_name": "\u8cc7\u6e90\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"resourcetype": "conference paper", "resourceuri": "http://purl.org/coar/resource_type/c_5794"}]}, "item_title": "CMOS\u6a19\u6e96\u30ed\u30b8\u30c3\u30af\u3092\u7528\u3044\u305f\u78ba\u7387\u7684\u30d5\u30e9\u30c3\u30b7\u30e5\u578bAD\u5909\u63db\u5668\u306e\u8a66\u4f5c\u3068\u8a55\u4fa1", "item_titles": {"attribute_name": "\u30bf\u30a4\u30c8\u30eb", "attribute_value_mlt": [{"subitem_title": "CMOS\u6a19\u6e96\u30ed\u30b8\u30c3\u30af\u3092\u7528\u3044\u305f\u78ba\u7387\u7684\u30d5\u30e9\u30c3\u30b7\u30e5\u578bAD\u5909\u63db\u5668\u306e\u8a66\u4f5c\u3068\u8a55\u4fa1", "subitem_title_language": "ja"}, {"subitem_title": "Design and evaluation of stochastic flash ADC using standard CMOS logic", "subitem_title_language": "en"}]}, "item_type_id": "5", "owner": "1", "path": ["10"], "permalink_uri": "https://kitami-it.repo.nii.ac.jp/records/8619", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2018-02-13"}, "publish_date": "2018-02-13", "publish_status": "0", "recid": "8619", "relation": {}, "relation_version_is_last": true, "title": ["CMOS\u6a19\u6e96\u30ed\u30b8\u30c3\u30af\u3092\u7528\u3044\u305f\u78ba\u7387\u7684\u30d5\u30e9\u30c3\u30b7\u30e5\u578bAD\u5909\u63db\u5668\u306e\u8a66\u4f5c\u3068\u8a55\u4fa1"], "weko_shared_id": -1}