WEKO3
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{"_buckets": {"deposit": "0f1ffa10-556f-470c-86ed-9d500d880cd2"}, "_deposit": {"id": "8583", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "8583"}, "status": "published"}, "_oai": {"id": "oai:kitami-it.repo.nii.ac.jp:00008583", "sets": ["10"]}, "author_link": ["89735", "220", "89736", "89737", "89738", "89739"], "item_5_biblio_info_6": {"attribute_name": "\u66f8\u8a8c\u60c5\u5831", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2010-03-25", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "33", "bibliographicPageEnd": "22", "bibliographicPageStart": "17", "bibliographicVolumeNumber": "ECT-10", "bibliographic_titles": [{"bibliographic_title": "\u96fb\u6c17\u5b66\u4f1a\u7814\u7a76\u4f1a\u8cc7\u6599. ECT, \u96fb\u5b50\u56de\u8def\u7814\u7a76\u4f1a"}]}]}, "item_5_description_4": {"attribute_name": "\u6284\u9332", "attribute_value_mlt": [{"subitem_description": "A new low voltage operating fully differential CMOS OTA construction, which uses dual-input cascoded CMOS inverters, is proposed. The OTA is a two-stage configuration with dual-input cascoded CMOS inverters at the input stage, and traditional CMOS inverters in the output stage, with a common-mode feedback path form the output terminals to one of the input terminals of cascoded CMOS inverters. The OTA has been designed and fabricated in a 0.15 \u03bcm triple-well CMOS process, in order to effectively reduce its threshould voltages by the bulk bias technique. The OTA successfully operated from 1 V power supply, with 59 dB of differential voltage gain, 80.9 dB of CMRR and 25 MHz of unity gain frequency, at 60 \u03bcA of current consumption.", "subitem_description_type": "Abstract"}]}, "item_5_publisher_32": {"attribute_name": "\u51fa\u7248\u8005", "attribute_value_mlt": [{"subitem_publisher": "\u4e00\u822c\u793e\u56e3\u6cd5\u4eba \u96fb\u6c17\u5b66\u4f1a"}]}, "item_5_rights_12": {"attribute_name": "\u6a29\u5229", "attribute_value_mlt": [{"subitem_rights": "c2010IEEJapan"}]}, "item_5_select_15": {"attribute_name": "\u8457\u8005\u7248\u30d5\u30e9\u30b0", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_access_right": {"attribute_name": "\u30a2\u30af\u30bb\u30b9\u6a29", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "\u8457\u8005", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "\u77e2\u6fa4, \u548c\u6a39", "creatorNameLang": "ja"}], "nameIdentifiers": [{"nameIdentifier": "89735", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "\u8c37\u672c, \u6d0b", "creatorNameLang": "ja"}], "nameIdentifiers": [{"nameIdentifier": "220", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "20322886", "nameIdentifierScheme": "KAKEN - \u7814\u7a76\u8005\u691c\u7d22", "nameIdentifierURI": "https://nrid.nii.ac.jp/ja/nrid/1000020322886/"}]}, {"creatorNames": [{"creatorName": "\u539f\u53e3, \u5927", "creatorNameLang": "ja"}], "nameIdentifiers": [{"nameIdentifier": "89736", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "YAZAWA, Kazuki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "89737", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "TANIMOTO, Hiroshi", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "89738", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "HARAGUCHI, Masaru", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "89739", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "\u30d5\u30a1\u30a4\u30eb\u60c5\u5831", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-02-07"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "ECT-10-33.pdf", "filesize": [{"value": "1.6 MB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 1600000.0, "url": {"label": "ECT-10-33", "objectType": "fulltext", "url": "https://kitami-it.repo.nii.ac.jp/record/8583/files/ECT-10-33.pdf"}, "version_id": "e9949bf0-6954-4aec-ab42-8168d2d19701"}]}, "item_keyword": {"attribute_name": "\u30ad\u30fc\u30ef\u30fc\u30c9", "attribute_value_mlt": [{"subitem_subject": "\u30ab\u30b9\u30b3\u30fc\u30c9\u578bCMOS\u30a4\u30f3\u30d0\u30fc\u30bf", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "\u5168\u5dee\u52d5OTA", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "\u540c\u76f8\u9664\u53bb\u56de\u8def", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "\u9ad8\u96fb\u5727\u5229\u5f97", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "\u4f4e\u96fb\u5727\u52d5\u4f5c", "subitem_subject_language": "ja", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Cascoded CMOS Inverter", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Differential OTA", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Common-Mode Rejection Circuit", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}, {"subitem_subject": "High Voltage Gain", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Low Voltage Operation", "subitem_subject_language": "en", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "\u8a00\u8a9e", "attribute_value_mlt": [{"subitem_language": "jpn"}]}, "item_resource_type": {"attribute_name": "\u8cc7\u6e90\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"resourcetype": "conference paper", "resourceuri": "http://purl.org/coar/resource_type/c_5794"}]}, "item_title": "\u30ab\u30b9\u30b3\u30fc\u30c9\u578bCMOS\u30a4\u30f3\u30d0\u30fc\u30bf\u3092\u7528\u3044\u305f\u5168\u5dee\u52d5OTA\u306e\u8a2d\u8a08\u3068\u8a55\u4fa1", "item_titles": {"attribute_name": "\u30bf\u30a4\u30c8\u30eb", "attribute_value_mlt": [{"subitem_title": "\u30ab\u30b9\u30b3\u30fc\u30c9\u578bCMOS\u30a4\u30f3\u30d0\u30fc\u30bf\u3092\u7528\u3044\u305f\u5168\u5dee\u52d5OTA\u306e\u8a2d\u8a08\u3068\u8a55\u4fa1", "subitem_title_language": "ja"}, {"subitem_title": "Design and Evaluation of Fully Differentioal OTA Using Cascoded CMOS Inverters", "subitem_title_language": "en"}]}, "item_type_id": "5", "owner": "1", "path": ["10"], "permalink_uri": "https://kitami-it.repo.nii.ac.jp/records/8583", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2018-02-07"}, "publish_date": "2018-02-07", "publish_status": "0", "recid": "8583", "relation": {}, "relation_version_is_last": true, "title": ["\u30ab\u30b9\u30b3\u30fc\u30c9\u578bCMOS\u30a4\u30f3\u30d0\u30fc\u30bf\u3092\u7528\u3044\u305f\u5168\u5dee\u52d5OTA\u306e\u8a2d\u8a08\u3068\u8a55\u4fa1"], "weko_shared_id": -1}
カスコード型CMOSインバータを用いた全差動OTAの設計と評価
https://kitami-it.repo.nii.ac.jp/records/8583
6b4ea523-dfbb-4a82-b32f-59004c6d2ad3
名前 / ファイル | ライセンス | アクション | |
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Item type | 会議発表論文 / Conference Paper(1) | |||||
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公開日 | 2018-02-07 | |||||
タイトル | ||||||
言語 | ja | |||||
タイトル | カスコード型CMOSインバータを用いた全差動OTAの設計と評価 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | Design and Evaluation of Fully Differentioal OTA Using Cascoded CMOS Inverters | |||||
言語 | ||||||
言語 | jpn | |||||
キーワード | ||||||
言語 | ja | |||||
主題Scheme | Other | |||||
主題 | カスコード型CMOSインバータ | |||||
キーワード | ||||||
言語 | ja | |||||
主題Scheme | Other | |||||
主題 | 全差動OTA | |||||
キーワード | ||||||
言語 | ja | |||||
主題Scheme | Other | |||||
主題 | 同相除去回路 | |||||
キーワード | ||||||
言語 | ja | |||||
主題Scheme | Other | |||||
主題 | 高電圧利得 | |||||
キーワード | ||||||
言語 | ja | |||||
主題Scheme | Other | |||||
主題 | 低電圧動作 | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | Cascoded CMOS Inverter | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | Differential OTA | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | Common-Mode Rejection Circuit | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | High Voltage Gain | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | Low Voltage Operation | |||||
資源タイプ | ||||||
資源 | http://purl.org/coar/resource_type/c_5794 | |||||
タイプ | conference paper | |||||
アクセス権 | ||||||
アクセス権 | open access | |||||
アクセス権URI | http://purl.org/coar/access_right/c_abf2 | |||||
著者 |
矢澤, 和樹
× 矢澤, 和樹× 谷本, 洋× 原口, 大× YAZAWA, Kazuki× TANIMOTO, Hiroshi× HARAGUCHI, Masaru |
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抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | A new low voltage operating fully differential CMOS OTA construction, which uses dual-input cascoded CMOS inverters, is proposed. The OTA is a two-stage configuration with dual-input cascoded CMOS inverters at the input stage, and traditional CMOS inverters in the output stage, with a common-mode feedback path form the output terminals to one of the input terminals of cascoded CMOS inverters. The OTA has been designed and fabricated in a 0.15 μm triple-well CMOS process, in order to effectively reduce its threshould voltages by the bulk bias technique. The OTA successfully operated from 1 V power supply, with 59 dB of differential voltage gain, 80.9 dB of CMRR and 25 MHz of unity gain frequency, at 60 μA of current consumption. | |||||
書誌情報 |
電気学会研究会資料. ECT, 電子回路研究会 巻 ECT-10, 号 33, p. 17-22, 発行日 2010-03-25 |
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権利 | ||||||
権利情報 | c2010IEEJapan | |||||
著者版フラグ | ||||||
値 | publisher | |||||
出版者 | ||||||
出版者 | 一般社団法人 電気学会 |