@inproceedings{oai:kitami-it.repo.nii.ac.jp:00008583,
 author = {矢澤, 和樹 and 谷本, 洋 and 原口, 大 and YAZAWA, Kazuki and TANIMOTO, Hiroshi and HARAGUCHI, Masaru},
 book = {電気学会研究会資料. ECT, 電子回路研究会},
 issue = {33},
 month = {Mar},
 note = {A new low voltage operating fully differential CMOS OTA construction, which uses dual-input cascoded CMOS inverters, is proposed. The OTA is a two-stage configuration with dual-input cascoded CMOS inverters at the input stage, and traditional CMOS inverters in the output stage, with a common-mode feedback path form the output terminals to one of the input terminals of cascoded CMOS inverters. The OTA has been designed and fabricated in a 0.15 μm triple-well CMOS process, in order to effectively reduce its threshould voltages by the bulk bias technique. The OTA successfully operated from 1 V power supply, with 59 dB of differential voltage gain, 80.9 dB of CMRR and 25 MHz of unity gain frequency, at 60 μA of current consumption.},
 pages = {17--22},
 publisher = {一般社団法人 電気学会},
 title = {カスコード型CMOSインバータを用いた全差動OTAの設計と評価},
 volume = {ECT-10},
 year = {2010}
}