{"_buckets": {"deposit": "5aa2cb8f-fadc-4610-8083-57f596058604"}, "_deposit": {"id": "8270", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "8270"}, "status": "published"}, "_oai": {"id": "oai:kitami-it.repo.nii.ac.jp:00008270", "sets": ["1:87"]}, "author_link": ["44844", "43339", "43340", "43341", "43342", "43343", "43344"], "item_1646810750418": {"attribute_name": "\u51fa\u7248\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_3_biblio_info_186": {"attribute_name": "\u66f8\u8a8c\u60c5\u5831", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2013-11", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "11", "bibliographicPageEnd": "2119", "bibliographicPageStart": "2114", "bibliographicVolumeNumber": "E96A", "bibliographic_titles": [{"bibliographic_title": "IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences"}]}]}, "item_3_description_184": {"attribute_name": "\u6284\u9332", "attribute_value_mlt": [{"subitem_description": "This paper presents a VLSI design of a Tomlinson-Harashima (TH) precoder for multi-user MIMO (MU-MIMO) systems. The TH precoder consists of LQ decomposition (LQD), interference cancellation (IC), and weight coefficient multiplication (WCM) units. The LQ decomposition unit is based on an application specific instruction-set processor (ASIP) architecture with floating-point arithmetic for high accuracy operations. In the IC and WCM units with fixed-point arithmetic, the proposed architecture uses an arrayed pipeline structure to shorten a circuit critical path delay. The implementation result shows that the proposed architecture reduces circuit area and power consumption by 11% and 15%, respectively.", "subitem_description_type": "Abstract"}]}, "item_3_full_name_183": {"attribute_name": "\u8457\u8005\u5225\u540d", "attribute_value_mlt": [{"nameIdentifiers": [{"nameIdentifier": "44844", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "20447080", "nameIdentifierScheme": "KAKEN", "nameIdentifierURI": "https://nrid.nii.ac.jp/ja/nrid/1000020447080 "}], "names": [{"name": "\u5409\u6fa4, \u771f\u543e", "nameLang": "ja"}]}]}, "item_3_publisher_212": {"attribute_name": "\u51fa\u7248\u8005", "attribute_value_mlt": [{"subitem_publisher": "Institute of Electronics, Information and Communication Engineers"}]}, "item_3_relation_191": {"attribute_name": "DOI", "attribute_value_mlt": [{"subitem_relation_type_id": {"subitem_relation_type_id_text": "http://doi.org/10.1587/transfun.E96.A.2114", "subitem_relation_type_select": "DOI"}}]}, "item_3_rights_192": {"attribute_name": "\u6a29\u5229", "attribute_value_mlt": [{"subitem_rights": "c 2013 The Institute of Electronics, Information and Communication Engineers"}]}, "item_3_select_195": {"attribute_name": "\u8457\u8005\u7248\u30d5\u30e9\u30b0", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_3_subject_196": {"attribute_name": "\u65e5\u672c\u5341\u9032\u5206\u985e\u6cd5", "attribute_value_mlt": [{"subitem_subject": "540", "subitem_subject_scheme": "NDC"}]}, "item_access_right": {"attribute_name": "\u30a2\u30af\u30bb\u30b9\u6a29", "attribute_value_mlt": [{"subitem_access_right_uri": "open access"}]}, "item_creator": {"attribute_name": "\u8457\u8005", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "Shimazaki, Kosuke", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43339", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Yoshizawa, Shingo", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43340", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Hatakawa, Yasuyuki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43341", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Matsumoto, Tomoko", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43342", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Konishi, Satoshi", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43343", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Miyanaga, Yoshikazu", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43344", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "\u30d5\u30a1\u30a4\u30eb\u60c5\u5831", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2016-11-22"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf", "filesize": [{"value": "2.6 MB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 2600000.0, "url": {"label": "2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf", "url": "https://kitami-it.repo.nii.ac.jp/record/8270/files/2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf"}, "version_id": "07fa7aa0-d3ac-4a30-951b-678759f4ff56"}]}, "item_keyword": {"attribute_name": "\u30ad\u30fc\u30ef\u30fc\u30c9", "attribute_value_mlt": [{"subitem_subject": "multi-user MIMO", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Tomlinson-Harashima precoding", "subitem_subject_scheme": "Other"}, {"subitem_subject": "LQ decomposition", "subitem_subject_scheme": "Other"}, {"subitem_subject": "interference cancellation", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "\u8a00\u8a9e", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "\u8cc7\u6e90\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing", "item_titles": {"attribute_name": "\u30bf\u30a4\u30c8\u30eb", "attribute_value_mlt": [{"subitem_title": "A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing", "subitem_title_language": "en"}]}, "item_type_id": "3", "owner": "1", "path": ["1/87"], "permalink_uri": "https://kitami-it.repo.nii.ac.jp/records/8270", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2016-07-15"}, "publish_date": "2016-07-15", "publish_status": "0", "recid": "8270", "relation": {}, "relation_version_is_last": true, "title": ["A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing"], "weko_shared_id": -1}