| Item type |
学術雑誌論文 / Journal Article(1) |
| 公開日 |
2016-07-15 |
| タイトル |
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|
タイトル |
A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing |
|
言語 |
en |
| 言語 |
|
|
言語 |
eng |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
multi-user MIMO |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
Tomlinson-Harashima precoding |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
LQ decomposition |
| キーワード |
|
|
主題Scheme |
Other |
|
主題 |
interference cancellation |
| 資源タイプ |
|
|
資源 |
http://purl.org/coar/resource_type/c_6501 |
|
タイプ |
journal article |
| アクセス権 |
|
|
アクセス権URI |
open access |
| 著者 |
Shimazaki, Kosuke
Yoshizawa, Shingo
Hatakawa, Yasuyuki
Matsumoto, Tomoko
Konishi, Satoshi
Miyanaga, Yoshikazu
|
| 著者別名 |
|
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|
識別子Scheme |
WEKO |
|
|
識別子 |
44844 |
|
|
識別子Scheme |
KAKEN |
|
|
識別子URI |
https://nrid.nii.ac.jp/ja/nrid/1000020447080 |
|
|
識別子 |
20447080 |
|
|
姓名 |
吉澤, 真吾 |
|
|
言語 |
ja |
| 抄録 |
|
|
内容記述タイプ |
Abstract |
|
内容記述 |
This paper presents a VLSI design of a Tomlinson-Harashima (TH) precoder for multi-user MIMO (MU-MIMO) systems. The TH precoder consists of LQ decomposition (LQD), interference cancellation (IC), and weight coefficient multiplication (WCM) units. The LQ decomposition unit is based on an application specific instruction-set processor (ASIP) architecture with floating-point arithmetic for high accuracy operations. In the IC and WCM units with fixed-point arithmetic, the proposed architecture uses an arrayed pipeline structure to shorten a circuit critical path delay. The implementation result shows that the proposed architecture reduces circuit area and power consumption by 11% and 15%, respectively. |
| 書誌情報 |
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences
巻 E96A,
号 11,
p. 2114-2119,
発行日 2013-11
|
| DOI |
|
|
|
識別子タイプ |
DOI |
|
|
関連識別子 |
http://doi.org/10.1587/transfun.E96.A.2114 |
| 権利 |
|
|
権利情報 |
c 2013 The Institute of Electronics, Information and Communication Engineers |
| 出版者 |
|
|
出版者 |
Institute of Electronics, Information and Communication Engineers |
| 著者版フラグ |
|
|
言語 |
en |
|
値 |
publisher |
| 出版タイプ |
|
|
出版タイプ |
VoR |
|
出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf (2.6 MB)
