{"created":"2021-03-01T06:00:43.832438+00:00","id":8270,"links":{},"metadata":{"_buckets":{"deposit":"8d4bd3c1-ff9c-4a4a-b725-0ba94ed30699"},"_deposit":{"created_by":188,"id":"8270","owners":[188],"pid":{"revision_id":0,"type":"depid","value":"8270"},"status":"published"},"_oai":{"id":"oai:kitami-it.repo.nii.ac.jp:00008270","sets":["1:87"]},"author_link":["43339","298","43341","43342","43343","43344"],"control_number":"8270","item_1646810750418":{"attribute_name":"出版タイプ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_3_biblio_info_186":{"attribute_name":"bibliographic_information","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2013-11","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"11","bibliographicPageEnd":"2119","bibliographicPageStart":"2114","bibliographicVolumeNumber":"E96A","bibliographic_titles":[{"bibliographic_title":"IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences"}]}]},"item_3_description_184":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"This paper presents a VLSI design of a Tomlinson-Harashima (TH) precoder for multi-user MIMO (MU-MIMO) systems. The TH precoder consists of LQ decomposition (LQD), interference cancellation (IC), and weight coefficient multiplication (WCM) units. The LQ decomposition unit is based on an application specific instruction-set processor (ASIP) architecture with floating-point arithmetic for high accuracy operations. In the IC and WCM units with fixed-point arithmetic, the proposed architecture uses an arrayed pipeline structure to shorten a circuit critical path delay. The implementation result shows that the proposed architecture reduces circuit area and power consumption by 11% and 15%, respectively.","subitem_description_type":"Abstract"}]},"item_3_publisher_212":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Institute of Electronics, Information and Communication Engineers"}]},"item_3_relation_191":{"attribute_name":"item_3_relation_191","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"http://doi.org/10.1587/transfun.E96.A.2114","subitem_relation_type_select":"DOI"}}]},"item_3_rights_192":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"c 2013 The Institute of Electronics, Information and Communication Engineers"}]},"item_3_select_195":{"attribute_name":"item_3_select_195","attribute_value_mlt":[{"subitem_select_item":"publisher","subitem_select_language":"en"}]},"item_access_right":{"attribute_name":"アクセス権","attribute_value_mlt":[{"subitem_access_right_uri":"open access"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Shimazaki, Kosuke","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"43339","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Yoshizawa, Shingo","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"298","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Hatakawa, Yasuyuki","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"43341","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Matsumoto, Tomoko","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"43342","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Konishi, Satoshi","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"43343","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Miyanaga, Yoshikazu","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"43344","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2016-11-22"}],"displaytype":"detail","filename":"2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf","filesize":[{"value":"2.6 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf","url":"https://kitami-it.repo.nii.ac.jp/record/8270/files/2013_A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing.pdf"},"version_id":"1f923bc4-9ce0-497d-818e-fed4f53eab13"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"multi-user MIMO","subitem_subject_scheme":"Other"},{"subitem_subject":"Tomlinson-Harashima precoding","subitem_subject_scheme":"Other"},{"subitem_subject":"LQ decomposition","subitem_subject_scheme":"Other"},{"subitem_subject":"interference cancellation","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"item_resource_type","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing","subitem_title_language":"en"}]},"item_type_id":"3","owner":"188","path":["87"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2016-07-15"},"publish_date":"2016-07-15","publish_status":"0","recid":"8270","relation_version_is_last":true,"title":["A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing"],"weko_creator_id":"188","weko_shared_id":-1},"updated":"2025-10-07T00:15:29.954875+00:00"}