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Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts
https://kitami-it.repo.nii.ac.jp/records/8200
https://kitami-it.repo.nii.ac.jp/records/8200a1ca1ecc-d135-4542-9e03-4477ffe39122
| 名前 / ファイル | ライセンス | アクション |
|---|---|---|
2007_Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts.pdf (365.2 kB)
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| Item type | 学術雑誌論文 / Journal Article(1) | |||||||||
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| 公開日 | 2016-06-27 | |||||||||
| タイトル | ||||||||||
| タイトル | Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts | |||||||||
| 言語 | en | |||||||||
| 言語 | ||||||||||
| 言語 | eng | |||||||||
| キーワード | ||||||||||
| 主題Scheme | Other | |||||||||
| 主題 | RC polyphase filter | |||||||||
| キーワード | ||||||||||
| 主題Scheme | Other | |||||||||
| 主題 | equal ripple | |||||||||
| キーワード | ||||||||||
| 主題Scheme | Other | |||||||||
| 主題 | transfer function preserving transformation | |||||||||
| キーワード | ||||||||||
| 主題Scheme | Other | |||||||||
| 主題 | element value spread | |||||||||
| 資源タイプ | ||||||||||
| 資源 | http://purl.org/coar/resource_type/c_6501 | |||||||||
| タイプ | journal article | |||||||||
| アクセス権 | ||||||||||
| アクセス権 | open access | |||||||||
| アクセス権URI | http://purl.org/coar/access_right/c_abf2 | |||||||||
| 著者 |
TANABE, Hiroaki
× TANABE, Hiroaki
× TANIMOTO, Hiroshi
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| 著者別名 | ||||||||||
| 識別子Scheme | WEKO | |||||||||
| 識別子 | 44845 | |||||||||
| 識別子Scheme | KAKEN | |||||||||
| 識別子URI | https://nrid.nii.ac.jp/ja/nrid/1000020322886 | |||||||||
| 識別子 | 20322886 | |||||||||
| 姓名 | 谷本, 洋 | |||||||||
| 言語 | ja | |||||||||
| 抄録 | ||||||||||
| 内容記述タイプ | Abstract | |||||||||
| 内容記述 | Element value spread of an equal-ripple RC polyphase filter depends heavily on the order of zero assignment. To find the optimum design, we must conduct exhaustive design for all the possible zero assignments. This paper describes two circuit transformations on equal-ripple RC polyphase filters, which preserve their transfer functions, for reducing circuit design efforts. Proposed Method I exchanges (R, C) values to (1/C, 1/R) for each stage. This gives a new circuit with different zero assignment for each stage of its original circuit. Method II flips over the original circuit and exchanges the resulting (R_i, C_i) values for (C_<n-i+1>, R_<n-i+1>) for each i-th stage. Those circuit transformations can reduce a number of circuit designs down to 1/4 of the straight-forward method. This considerably reduces a burden for exhaustive design for searching the minimum element value spread condition. Some design examples are given to illustrate the proposed methods. | |||||||||
| 書誌情報 |
IEICE transactions on fundamentals of electronics, communications and computer sciences 巻 E90-A, 号 2, p. 333-338, 発行日 2007-02 |
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| DOI | ||||||||||
| 識別子タイプ | DOI | |||||||||
| 関連識別子 | http://doi.org/10.1093/ietfec/e90-a.2.333 | |||||||||
| 権利 | ||||||||||
| 権利情報 | c2007 IEICE | |||||||||
| 出版者 | ||||||||||
| 出版者 | THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS | |||||||||
| 関連サイト | ||||||||||
| URL | https://search.ieice.org/index.html | |||||||||
| 著者版フラグ | ||||||||||
| 言語 | en | |||||||||
| 値 | publisher | |||||||||
| 出版タイプ | ||||||||||
| 出版タイプ | VoR | |||||||||
| 出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||||||
