@inproceedings{oai:kitami-it.repo.nii.ac.jp:00008584,
 author = {澤本, 岳秀 and 桑原, 浩一 and 谷本, 洋 and 原口, 大 and SAWAMOTO, Takehide and KUWAHARA, Koichi and TANIMOTO, Hiroshi and HARAGUCHI, Masaru},
 book = {電気学会研究会資料. ECT, 電子回路研究会},
 issue = {34},
 month = {Mar},
 note = {Common-mode rejection ratio (CMRR) deviation due to mismatching among MOS transistors in feedforward type OTA has been evaluated for chips fabricated with and without common-centroid layout technique. The mesured common-mode voltage gain (CMVG) data for 10 samples are evaluated by averaged CMVG and its relative variation to input common-mode dc bias point. The results clearly indicate the effectiveness of the common-centroid layout for an OTA in OTA in an 0.15 μm CMOS process to have better CMRR performance.},
 pages = {23--28},
 publisher = {一般社団法人 電気学会},
 title = {コモンセントロイド配置によるCMOS OTAのCMRR改善効果の評価},
 volume = {ECT-10},
 year = {2010}
}