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Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 μm CMOS Technology
https://kitami-it.repo.nii.ac.jp/records/8206
https://kitami-it.repo.nii.ac.jp/records/820676b0554b-f665-453e-981c-727444254c37
名前 / ファイル | ライセンス | アクション |
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Item type | 学術雑誌論文 / Journal Article(1) | |||||||||
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公開日 | 2016-06-29 | |||||||||
タイトル | ||||||||||
タイトル | Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 μm CMOS Technology | |||||||||
言語 | en | |||||||||
言語 | ||||||||||
言語 | eng | |||||||||
キーワード | ||||||||||
主題Scheme | Other | |||||||||
主題 | low power supply voltage | |||||||||
キーワード | ||||||||||
主題Scheme | Other | |||||||||
主題 | large output swing | |||||||||
キーワード | ||||||||||
主題Scheme | Other | |||||||||
主題 | fully differential OTA | |||||||||
キーワード | ||||||||||
主題Scheme | Other | |||||||||
主題 | NMOS inverters | |||||||||
資源タイプ | ||||||||||
資源 | http://purl.org/coar/resource_type/c_6501 | |||||||||
タイプ | journal article | |||||||||
アクセス権 | ||||||||||
アクセス権 | open access | |||||||||
アクセス権URI | http://purl.org/coar/access_right/c_abf2 | |||||||||
著者 |
TANAKA, Atsushi
× TANAKA, Atsushi
× TANIMOTO, Hiroshi
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著者別名 | ||||||||||
識別子Scheme | WEKO | |||||||||
識別子 | 44845 | |||||||||
識別子Scheme | KAKEN | |||||||||
識別子URI | https://nrid.nii.ac.jp/ja/nrid/1000020322886 | |||||||||
識別子 | 20322886 | |||||||||
姓名 | 谷本, 洋 | |||||||||
言語 | ja | |||||||||
抄録 | ||||||||||
内容記述タイプ | Abstract | |||||||||
内容記述 | This paper presents a 1 V operating fully differential OTA using NMOS inverters in place of the traditional differential pair. To obtain high gain, a two-stage configuration is used in which the first stage has feedforward paths to cancel the common-mode signal, and the second stage has common-mode feedback paths to stabilize the output common-mode voltage. The proposed OTA was fabricated by an 0.18 μm CMOS technology. Measured gain is 40 dB and GBW is 10 MHz, in addition to differential output voltage swing of 1.8 Vp - p. It is confirmed that the proposed OTA can operate from 1 V power supply and has very large output swing capability even in a 1 V operation. The proposed OTA configuration contributes to a solution to the low power supply voltage issue in scaled CMOS analog circuits. | |||||||||
書誌情報 |
IEICE TRANSACTIONS on Electronics 巻 E92-C, 号 6, p. 822-827, 発行日 2009-06 |
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権利 | ||||||||||
権利情報 | c2009 IEICE | |||||||||
出版者 | ||||||||||
出版者 | THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS | |||||||||
関連サイト | ||||||||||
URL | http://search.ieice.org/index.html | |||||||||
著者版フラグ | ||||||||||
言語 | en | |||||||||
値 | publisher | |||||||||
出版タイプ | ||||||||||
出版タイプ | VoR | |||||||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 |