{"_buckets": {"deposit": "526b7370-7995-413f-aa75-89b2d24ee01e"}, "_deposit": {"id": "8206", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "8206"}, "status": "published"}, "_oai": {"id": "oai:kitami-it.repo.nii.ac.jp:00008206", "sets": ["87"]}, "author_link": ["44845", "43002", "43003"], "item_1646810750418": {"attribute_name": "出版タイプ", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_3_biblio_info_186": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2009-06", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "6", "bibliographicPageEnd": "827", "bibliographicPageStart": "822", "bibliographicVolumeNumber": "E92-C", "bibliographic_titles": [{"bibliographic_title": "IEICE TRANSACTIONS on Electronics"}]}]}, "item_3_description_184": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "This paper presents a 1 V operating fully differential OTA using NMOS inverters in place of the traditional differential pair. To obtain high gain, a two-stage configuration is used in which the first stage has feedforward paths to cancel the common-mode signal, and the second stage has common-mode feedback paths to stabilize the output common-mode voltage. The proposed OTA was fabricated by an 0.18 μm CMOS technology. Measured gain is 40 dB and GBW is 10 MHz, in addition to differential output voltage swing of 1.8 Vp - p. It is confirmed that the proposed OTA can operate from 1 V power supply and has very large output swing capability even in a 1 V operation. The proposed OTA configuration contributes to a solution to the low power supply voltage issue in scaled CMOS analog circuits.", "subitem_description_type": "Abstract"}]}, "item_3_full_name_183": {"attribute_name": "著者別名", "attribute_value_mlt": [{"nameIdentifiers": [{"nameIdentifier": "44845", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "20322886", "nameIdentifierScheme": "KAKEN", "nameIdentifierURI": "https://nrid.nii.ac.jp/ja/nrid/1000020322886 "}], "names": [{"name": "谷本, 洋", "nameLang": "ja"}]}]}, "item_3_link_221": {"attribute_name": "関連サイト", "attribute_value_mlt": [{"subitem_link_url": "http://search.ieice.org/index.html"}]}, "item_3_publisher_212": {"attribute_name": "出版者", "attribute_value_mlt": [{"subitem_publisher": "THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS"}]}, "item_3_rights_192": {"attribute_name": "権利", "attribute_value_mlt": [{"subitem_rights": "c2009 IEICE"}]}, "item_3_select_195": {"attribute_name": "著者版フラグ", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_3_subject_196": {"attribute_name": "日本十進分類法", "attribute_value_mlt": [{"subitem_subject": "540", "subitem_subject_scheme": "NDC"}]}, "item_access_right": {"attribute_name": "アクセス権", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "TANAKA, Atsushi", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43002", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "TANIMOTO, Hiroshi", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "43003", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "ファイル情報", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2016-11-22"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "e92-c_6_822.pdf", "filesize": [{"value": "608.3 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 608300.0, "url": {"label": "e92-c_6_822.pdf", "url": "https://kitami-it.repo.nii.ac.jp/record/8206/files/e92-c_6_822.pdf"}, "version_id": "e5f889a3-9094-41ea-b08b-e9d0de69b301"}]}, "item_keyword": {"attribute_name": "キーワード", "attribute_value_mlt": [{"subitem_subject": "low power supply voltage", "subitem_subject_scheme": "Other"}, {"subitem_subject": "large output swing", "subitem_subject_scheme": "Other"}, {"subitem_subject": "fully differential OTA", "subitem_subject_scheme": "Other"}, {"subitem_subject": "NMOS inverters", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 μm CMOS Technology", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 μm CMOS Technology", "subitem_title_language": "en"}]}, "item_type_id": "3", "owner": "1", "path": ["87"], "permalink_uri": "https://kitami-it.repo.nii.ac.jp/records/8206", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2016-06-29"}, "publish_date": "2016-06-29", "publish_status": "0", "recid": "8206", "relation": {}, "relation_version_is_last": true, "title": ["Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 μm CMOS Technology"], "weko_shared_id": -1}