2024-03-28T22:50:13Z
https://kitami-it.repo.nii.ac.jp/oai
oai:kitami-it.repo.nii.ac.jp:00008583
2022-12-13T02:23:52Z
10
カスコード型CMOSインバータを用いた全差動OTAの設計と評価
Design and Evaluation of Fully Differentioal OTA Using Cascoded CMOS Inverters
矢澤, 和樹
谷本, 洋
原口, 大
YAZAWA, Kazuki
TANIMOTO, Hiroshi
HARAGUCHI, Masaru
open access
c2010IEEJapan
カスコード型CMOSインバータ
全差動OTA
同相除去回路
高電圧利得
低電圧動作
Cascoded CMOS Inverter
Differential OTA
Common-Mode Rejection Circuit
High Voltage Gain
Low Voltage Operation
A new low voltage operating fully differential CMOS OTA construction, which uses dual-input cascoded CMOS inverters, is proposed. The OTA is a two-stage configuration with dual-input cascoded CMOS inverters at the input stage, and traditional CMOS inverters in the output stage, with a common-mode feedback path form the output terminals to one of the input terminals of cascoded CMOS inverters. The OTA has been designed and fabricated in a 0.15 μm triple-well CMOS process, in order to effectively reduce its threshould voltages by the bulk bias technique. The OTA successfully operated from 1 V power supply, with 59 dB of differential voltage gain, 80.9 dB of CMRR and 25 MHz of unity gain frequency, at 60 μA of current consumption.
一般社団法人 電気学会
2010-03-25
jpn
conference paper
https://kitami-it.repo.nii.ac.jp/records/8583
電気学会研究会資料. ECT, 電子回路研究会
ECT-10
33
17
22
https://kitami-it.repo.nii.ac.jp/record/8583/files/ECT-10-33.pdf
application/pdf
1.6 MB
2018-02-07